Navaz K

Work place: Manonmaniam Sundaranar University, Department of CSE, Tirunelveli, 627 012, Tamilnadu, India

E-mail: navazit@gmail.com

Website:

Research Interests: Computer systems and computational processes, Computer Architecture and Organization, Systems Architecture, Network Architecture, Data Structures and Algorithms, Algorithm Design

Biography

Navaz K received the B.Tech degree in Information Technology in 2006, and the M.E degree in Computer Science and Engineering in 2009, all from Anna University, Tamilnadu, India. He is working towards his Ph.D in the department of Computer Science and Engineering, Manonmaniam Sundaranar University, Tirunelveli, Tamilnadu, India. 

His areas of interest in research are Computer Networks, Network Design and Simulations, Switch Architecture and Scheduling Algorithms for High Performance Switches.

Author Articles
Multicast Due Date Round-Robin Scheduling Algorithm for Input-Queued Switches

By Navaz K Kannan Balasubramanian

DOI: https://doi.org/10.5815/ijcnis.2016.02.07, Pub. Date: 8 Feb. 2016

In recent years, the Internet has incremented the several incipient applications that rely on multicast transmission. This paper discusses the challenges of scheduling algorithms for multicast in high-speed switches that reduces the overhead of adaptation by selecting a HOL (Head of Line Cell) using Round Robin pointer. The objective of this paper is to design a scheduling algorithm called MDDR (Multicast Due Date Round-Robin) scheduling to achieve maximum throughput and low delay that has two phases request and grant. In request phase, MDDR assigns a Due Date (Request Time Slot) for HOL cells of each queue in the input port. Round Robin Pointer is utilized in the grant phase to select a request if HOL occurs. MDDR achieves more preponderant performance than MDRR (Multicast Dual Round-Robin), since the request shall be made when the Due Date is reached. MDDR mainly minimizes many requests made for output ports and time complexity. The simulation results show that the proposed algorithm has good switching performance in throughput and average time delay under Bernoulli and bursty traffic conditions.

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