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Tejaswini P. Deshmukh

Work place: Electronics department, YCCE, Nagpur, India

E-mail: tejaswini.deshmukh@gmail.com

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Research Interests: Image Processing, Image Manipulation, Image Compression, Computer Architecture and Organization

Biography

Tejaswini P. Deshmukh, is an Assistant Professor at Yeshwantrao Chavan College of Engineering, Nagpur University. She is currently working towards the Ph.D. degree in Electronics Department of YCCE Research Centre, Nagpur University. Her research interest includes Digital Signal Processing, Digital Communication and Digital Image Processing. Her teaching interest includes Signals and Systems, Digital Signal Processing and Embedded Systems.

Author Articles
Design of Fast Fourier Transform Architecture for GF(24) with Reduced Operational Complexity

By Tejaswini P. Deshmukh Pooja R. Pawar P. R. Deshmukh P. K. Dakhole

DOI: https://doi.org/10.5815/ijigsp.2016.10.05, Pub. Date: 8 Oct. 2016

In this paper, the architecture for Fast Fourier Transform over Galois Field (24) is described. The method used is cyclotomic decomposition. The Cyclotomic Fast Fourier Transforms (CFFTs) are preferred due to low multiplicative complexity. The approach used is the decomposition of the arbitrary polynomial into a sum of linearized polynomials. Also, Common Subexpression Elimination (CSE) algorithm is used to reduce the additive complexity of the architecture. By using CSE algorithm, the design with reduced operational complexity has been described. 

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